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Networking Protocol Software for Embedded Processors
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Nios II Acceleration Reference Design.

Altera's premium FPGA products help to demonstrate that custom logic design can support high performance networking. The Altera Nios II processor core offers an optimized set of microcontroller design IP that can be easily deployed at the heart of economical FPGA logic designs. When used in combination with high performance network interface logic and NicheStack TCP/IP protocols, these FPGA based platforms can offer near wire-speed communications performance for networked device designs. Cost effective custom logic and high performance embedded TCP/IP software enable device connectivity for many new and exciting markets.

InterNiche Network Evaluation Kits (NEKs) for Altera platforms are pre-integrated systems of complementary networking technologies that demonstrate and exercise the capability of a Nios II based device design and can be targeted at different types of networking application profiles. Each NEK that we offer is a fully capable, integrated and optimized networked device application that has been tailored to the interfaces and memory configuration of the chosen hardware environment.

A typical Altera NEK would feature:

The web server pages consist of static and dynamic information displays drawn from the NicheTool internal stack diagnostics and monitoring databases.

For evaluation purposes, for each of these platforms, a run-time image or library is available that has been tested for development tool compatibility and run-time interoperability with the other network and device management components.